C8051F131R Silicon Labs, C8051F131R Datasheet - Page 155

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

11.3.2. External Interrupts
Two of the external interrupt sources (/INT0 and /INT1) are configurable as active-low level-sensitive or
active-low edge-sensitive inputs depending on the setting of bits IT0 (TCON.0) and IT1 (TCON.2). IE0
(TCON.1) and IE1 (TCON.3) serve as the interrupt-pending flag for the /INT0 and /INT1 external interrupts,
respectively. If an /INT0 or /INT1 external interrupt is configured as edge-sensitive, the corresponding
interrupt-pending flag is automatically cleared by the hardware when the CPU vectors to the ISR. When
configured as level sensitive, the interrupt-pending flag follows the state of the external interrupt's input pin.
The external interrupt source must hold the input active until the interrupt request is recognized. It must
then deactivate the interrupt request before execution of the ISR completes or another interrupt request
will be generated.
Interrupt Source
Reset
External Interrupt 0 (/INT0) 0x0003
Timer 0 Overflow
External Interrupt 1 (/INT1) 0x0013
Timer 1 Overflow
UART0
Timer 2
Serial Peripheral Interface 0x0033
SMBus Interface
ADC0 Window Comparator 0x0043
Programmable Counter
Array
Comparator 0 Falling Edge 0x0053
Comparator 0 Rising Edge 0x005B
Comparator 1 Falling Edge 0x0063
0x000B
0x001B
0x002B
0x003B
0x004B
0x0000
0x0023
Interru
Vector
pt
Table 11.4. Interrupt Summary
Priority
Order
Top
10
11
12
0
1
2
3
4
5
6
7
8
9
Pending Flags
None
IE0 (TCON.1)
TF0 (TCON.5)
IE1 (TCON.3)
TF1 (TCON.7)
RI0 (SCON0.0)
TI0 (SCON0.1)
TF2 (TMR2CN.7)
EXF2 (TMR2CN.6)
SPIF (SPI0CN.7)
WCOL (SPI0CN.6)
MODF (SPI0CN.5)
RXOVRN (SPI0CN.4)
SI (SMB0CN.3)
AD0WINT
(ADC0CN.1)
CF (PCA0CN.7)
CCFn (PCA0CN.n)
CP0FIF (CPT0CN.4)
CP0RIF (CPT0CN.5)
CP1FIF (CPT1CN.4)
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
N/A N/A 0
C8051F130/1/2/3
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
0 EX0 (IE.0) PX0 (IP.0)
0 ET0 (IE.1) PT0 (IP.1)
0 EX1 (IE.2) PX1 (IP.2)
0 ET1 (IE.3) PT1 (IP.3)
0 ES0 (IE.4) PS0 (IP.4)
0 ET2 (IE.5) PT2 (IP.5)
0
0
0
1
2
0
1
Always
Enabled
Enable
Flag
ESPI0
(EIE1.0)
ESMB0
(EIE1.1)
EWADC0
(EIE1.2)
EPCA0
(EIE1.3)
ECP0F
(EIE1.4)
ECP0R
(EIE1.5)
ECP1F
(EIE1.6)
Priority
Control
Always
Highest
PSPI0
(EIP1.0)
PSMB0
(EIP1.1)
PWADC0
(EIP1.2)
PPCA0
(EIP1.3)
PCP0F
(EIP1.4)
PCP0R
(EIP1.5)
PCP1F
(EIP1.6)
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