C8051F131R Silicon Labs, C8051F131R Datasheet - Page 250

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
250
Bits7–0: P1MDOUT.[7:0]: Port1 Output Mode Bits.
Bits7–0: P2.[7:0]: Port2 Output Latch Bits.
Note:
Note:
P2.7
R/W
R/W
Bit7
Bit7
(Write - Output appears on I/O pins per XBR0, XBR1, and XBR2 Registers)
0: Logic Low Output.
1: Logic High Output (open if corresponding P2MDOUT.n bit = 0).
(Read - Regardless of XBR0, XBR1, and XBR2 Register settings).
0: P2.n pin is logic low.
1: P2.n pin is logic high.
P2.[7:0] can be driven by the External Data Memory Interface (as Address[15:8] in Multiplexed
mode, or as Address[7:0] in Non-multiplexed mode). See
Memory Interface and On-Chip XRAM” on page 219
External Memory Interface.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
SDA, SCL, and RX0 (when UART0 is in Mode 0) and RX1 (when UART1 is in Mode 0) are
always configured as Open-Drain when they appear on Port pins.
P2.6
R/W
R/W
Bit6
Bit6
SFR Definition 18.8. P1MDOUT: Port1 Output Mode
P2.5
R/W
R/W
Bit5
Bit5
SFR Definition 18.9. P2: Port2 Data
P2.4
R/W
R/W
Bit4
Bit4
Rev. 1.4
P2.3
R/W
R/W
Bit3
Bit3
P2.2
R/W
R/W
Bit2
Bit2
for more information about the
Section “17. External Data
P2.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Page:
SFR Page:
P2.0
R/W
Address:
R/W
Bit0
Bit0
SFR
0xA5
F
0xA0
All Pages
Addressable
00000000
Reset Value
Reset Value
11111111
Bit