C8051F131R Silicon Labs, C8051F131R Datasheet - Page 137
![no-image](/images/no-image-200.jpg)
C8051F131R
Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F133R.pdf
(350 pages)
Specifications of C8051F131R
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
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Automatic hardware switching of the SFR Page on interrupts may be enabled or disabled as desired using
the SFR Automatic Page Control Enable Bit located in the SFR Page Control Register (SFRPGCN). This
function defaults to ‘enabled’ upon reset. In this way, the autoswitching function will be enabled unless dis-
abled in software.
A summary of the SFR locations (address and SFR page) is provided in Table 11.2. in the form of an SFR
memory map. Each memory location in the map has an SFR page row, denoting the page in which that
SFR resides. Note that certain SFR’s are accessible from ALL SFR pages, and are denoted by the “ (ALL
PAGES) ” designation. For example, the Port I/O registers P0, P1, P2, and P3 all have the “ (ALL PAGES) ”
designation, indicating these SFR’s are accessible from all SFR pages regardless of the SFRPAGE regis-
ter value.
CIP-51
Interrupt
Logic
Figure 11.4. SFR Page Stack
SFRPGCN Bit
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
SFRPAGE
SFRNEXT
SFRLAST
C8051F130/1/2/3
137
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