C8051F131R Silicon Labs, C8051F131R Datasheet - Page 315

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C8051F131R

Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F131R

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Bits 7–0: TL0: Timer 0 Low Byte.
Bits7–5: UNUSED. Read = 000b, Write = don’t care.
Bit4:
Bit3:
Bit2:
Bits1–0: SCA1–SCA0: Timer 0/1 Prescale Bits
R/W
R/W
Bit7
Bit7
-
The TL0 register is the low byte of the 16-bit Timer 0.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1. T1M is ignored when C/T1 is set to logic 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1–SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0. T0M is ignored when C/T0 is set to
logic 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Counter/Timer 0 uses the system clock.
UNUSED. Read = 0b, Write = don’t care.
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
*Note: External clock divided by 8 is synchronized with the system
SCA1
R/W
R/W
Bit6
Bit6
0
0
1
1
-
clock, and external clock must be less than or equal to the
system clock frequency to operate the timer in this mode.
SFR Definition 23.3. CKCON: Clock Control
SFR Definition 23.4. TL0: Timer 0 Low Byte
SCA0
R/W
R/W
Bit5
Bit5
-
0
1
0
1
T1M
R/W
R/W
Bit4
Bit4
External clock divided by 8*
System clock divided by 12
System clock divided by 48
System clock divided by 4
Prescaled Clock
Rev. 1.4
T0M
R/W
Bit3
R/W
Bit3
C8051F120/1/2/3/4/5/6/7
R/W
Bit2
R/W
Bit2
-
C8051F130/1/2/3
SCA1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
SCA0
R/W
R/W
Bit0
Bit0
0x8A
0
0x8E
0
00000000
Reset Value
00000000
Reset Value
315

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