C8051F131R Silicon Labs, C8051F131R Datasheet - Page 157
C8051F131R
Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F133R.pdf
(350 pages)
Specifications of C8051F131R
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
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11.3.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described below. Refer to the
datasheet section associated with a particular on-chip peripheral for information regarding valid interrupt
conditions for the peripheral and the behavior of its interrupt-pending flag(s).
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
R/W
EA
Bit7
EA: Enable All Interrupts.
This bit globally enables/disables all interrupts. It overrides the individual interrupt mask set-
tings.
0: Disable all interrupt sources.
1: Enable each interrupt according to its individual mask setting.
IEGF0: General Purpose Flag 0.
This is a general purpose flag for use under software control.
ET2: Enabler Timer 2 Interrupt.
This bit sets the masking of the Timer 2 interrupt.
0: Disable Timer 2 interrupt.
1: Enable Timer 2 interrupt.
ES0: Enable UART0 Interrupt.
This bit sets the masking of the UART0 interrupt.
0: Disable UART0 interrupt.
1: Enable UART0 interrupt.
ET1: Enable Timer 1 Interrupt.
This bit sets the masking of the Timer 1 interrupt.
0: Disable Timer 1 interrupt.
1: Enable Timer 1 interrupt.
EX1: Enable External Interrupt 1.
This bit sets the masking of External Interrupt 1.
0: Disable External Interrupt 1.
1: Enable External Interrupt 1.
ET0: Enable Timer 0 Interrupt.
This bit sets the masking of the Timer 0 interrupt.
0: Disable Timer 0 interrupts.
1: Enable Timer 0 interrupts.
EX0: Enable External Interrupt 0.
This bit sets the masking of External Interrupt 0.
0: Disable External Interrupt 0.
1: Enable External Interrupt 0.
IEGF0
R/W
Bit6
SFR Definition 11.12. IE: Interrupt Enable
ET2
R/W
Bit5
ES0
R/W
Bit4
Rev. 1.4
ET1
R/W
Bit3
C8051F120/1/2/3/4/5/6/7
EX1
R/W
Bit2
C8051F130/1/2/3
ET0
R/W
Bit1
SFR Address:
SFR Page:
EX0
R/W
Bit0
0xA8
All Pages
00000000
Addressable
Reset Value
Bit
157
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