C8051F131R Silicon Labs, C8051F131R Datasheet - Page 333

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

24.2.5. 8-Bit Pulse Width Modulator Mode
Each module can be used independently to generate pulse width modulated (PWM) outputs on its associ-
ated CEXn pin. The frequency of the output is dependent on the timebase for the PCA0 counter/timer. The
duty cycle of the PWM output signal is varied using the module's PCA0CPLn capture/compare register.
When the value in the low byte of the PCA0 counter/timer (PCA0L) is equal to the value in PCA0CPLn, the
output on the CEXn pin will be high. When the count value in PCA0L overflows, the CEXn output will be
low (see Figure 24.8). Also, when the counter/timer low byte (PCA0L) overflows from 0xFF to 0x00,
PCA0CPLn is reloaded automatically with the value stored in the counter/timer's high byte (PCA0H) with-
out software intervention. Setting the ECOMn and PWMn bits in the PCA0CPMn register enables 8-Bit
Pulse Width Modulator mode. The duty cycle for 8-Bit PWM Mode is given by Equation 24.2.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
W
P
M
1
6
n
0
PCA0CPMn
O
M
E
C
n
C
A
P
P
n
0 0 0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
W
M
P
n
C
C
E
F
n
0
PCA Timebase
Enable
Figure 24.8. PCA 8-Bit PWM Mode Diagram
Equation 24.2. 8-Bit PWM Duty Cycle
PCA0CPHn
Comparator
PCA0CPLn
PCA0L
8-bit
DutyCycle
Overflow
=
match
Rev. 1.4

-------------------------------------------------- -
256 PCA0CPHn
S
R
SET
CLR
–
C8051F120/1/2/3/4/5/6/7
Q
Q
256
C8051F130/1/2/3
CEXn

Crossbar
Port I/O
333