DS26528GNA4 Maxim Integrated, DS26528GNA4 Datasheet - Page 93

• Manufacturer Part Number: DS26528GNA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GNA4

• Part # Aliases: 90-26528-NA4

08Ch–08Fh
ADDRESS
0AAh
0ABh
0ACh
0ADh
0AEh
08Ah
09Ah
09Bh
09Ch
09Dh
09Eh
0A0h
0A1h
0A2h
0A3h
0A4h
0A5h
0A6h
0A7h
0A8h
0A9h
0AFh
0B0h
0B1h
0B2h
0B3h
0B4h
0B5h
0B6h
083h
084h
085h
086h
087h
088h
089h
090h
091h
092h
094h
095h
096h
097h
098h
099h
09Fh
08B
093
T1RDNCD1
T1RDNCD2
T1RUPCD1
T1RUPCD2
T1RSCD1
T1RSCD2
T1RSCC
RSCSE1
RSCSE2
RSCSE3
RSCSE4
RESCR
ERCNT
RHPBA
RBPBS
RIOCR
RRTS1
RRTS3
RRTS3
RRTS5
RIBOC
NAME
RHFC
RXPC
RCR3
RSS1
RSS2
RSS3
RSS4
RLS1
RLS2
RLS3
RLS4
RLS5
RLS7
RLS7
RIM1
RIM2
RIM3
RIM3
RIM4
RIM5
RIM7
RHF
RIIR
—
—
—
—
—
—
—
—
Receive Control Register 3
Receive I/O Configuration Register
Receive Elastic Store Control Register
Error-Counter Configuration Register
Receive HDLC FIFO Control Register
Receive Interleave Bus Operation Control Register
In-Band Receive Spare Control Register (T1 Mode Only)
Receive Expansion Port Control Register
Receive BERT Port Bit Suppress Register
Reserved
Receive Latched Status Register 1
Receive Latched Status Register 2
Receive Latched Status Register 3
Receive Latched Status Register 4
Receive Latched Status Register 5 (HDLC)
Reserved
Receive Latched Status Register 7 (T1 Mode)
Receive Latched Status Register 7 (E1 Mode)
Reserved
Receive-Signaling Status Register 1
Receive-Signaling Status Register 2
Receive-Signaling Status Register 3
Receive-Signaling Status Register 4 (E1 Mode Only)
Receive Spare Code Definition Register 1 (T1 Mode Only)
Receive Spare Code Definition Register 2 (T1 Mode Only)
Reserved
Receive Interrupt Information Register
Receive Interrupt Mask Register 1
Receive Interrupt Mask Register 2 (E1 Mode Only)
Receive Interrupt Mask Register 3 (T1 Mode)
Receive Interrupt Mask Register 3 (E1 Mode)
Receive Interrupt Mask Register 4
Receive Interrupt Mask Register 5 (HDLC)
Reserved
Receive Interrupt Mask Register 7 (T1 Mode)
Reserved
Receive-Signaling Change of State Enable Register 1
Receive-Signaling Change of State Enable Register 2
Receive-Signaling Change of State Enable Register 3
Receive-Signaling Change of State Enable Register 4 (E1 Mode Only)
Receive Up Code Definition Register 1 (T1 Mode Only)
Receive Up Code Definition Register 2 (T1 Mode Only)
Receive Down Code Definition Register 1 (T1 Mode Only)
Receive Down Code Definition Register 2 (T1 Mode Only)
Receive Real-Time Status Register 1
Reserved
Receive Real-Time Status Register 3 (T1 Mode)
Receive Real-Time Status Register 3 (E1 Mode)
Reserved
Receive Real-Time Status Register 5 (HDLC)
Receive HDLC Packet Bytes Available Register
Receive HDLC FIFO Register
FRAMER REGISTER LIST
93 of 276
DESCRIPTION
DS26528 Octal T1/E1/J1 Transceiver
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
—
R
R
R
R
R