DS26528GNA4 Maxim Integrated, DS26528GNA4 Datasheet - Page 209

• Manufacturer Part Number: DS26528GNA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GNA4

• Part # Aliases: 90-26528-NA4

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
The Transmit Interrupt Information register provides an indication of which status registers are generating an
interrupt. When an interrupt occurs, the host can read TIIR to quickly identify which of the transmit status registers
are causing the interrupt(s). These are real-time registers in that the bits will clear once the appropriate interrupt
has been serviced and cleared.
Bit 2: Transmit Latched Status Register 3 Interrupt Status (TLS3).
Bit 1: Transmit Latched Status Register 2 Interrupt Status (TLS2).
Bit 0: Transmit Latched Status Register 1 Interrupt Status (TLS1).
0 = no interrupt pending
1 = interrupt pending
0 = no interrupt pending
1 = interrupt pending
0 = no interrupt pending
1 = interrupt pending
—
7
0
TIIR
Transmit Interrupt Information Register
19Fh + (200h x n): where n = 0 to 7, for Ports 1 to 8
—
6
0
—
5
0
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—
4
0
—
3
0
DS26528 Octal T1/E1/J1 Transceiver
TLS3
2
0
TLS2
1
0
TLS1
0
0