DS26528GNA4 Maxim Integrated, DS26528GNA4 Datasheet - Page 109

• Manufacturer Part Number: DS26528GNA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GNA4

• Part # Aliases: 90-26528-NA4

Note 1:
Note 2:
9.3
Functions contained in the global registers include: framer reset, LIU reset, device ID, BERT interrupt status,
framer interrupt status, IBO configuration, MCLK configuration, and BPCLK configuration. The global registers bit
descriptions are presented in this section.
Table 9-10. Global Register Set
ADDRESS
0FCh
0FDh
0FAh
0FBh
0FEh
0F0h
0F1h
0F2h
0F3h
0F4h
0F5h
0F6h
0F7h
0F8h
0F9h
01Fh
Global Register Definitions
Reserved registers should only be written with all zeros.
The global registers are located in the framer address space. The corresponding address space for the other seven framers is
“Reserved,” and should be initialized with all zeros for proper operation.
GTCCR
GLSRR
GFSRR
GTCR1
GTCR2
GFIMR
GBIMR
GLIMR
GBISR
GFISR
GLISR
NAME
GFCR
IDR
—
—
—
Global Framer Control Register
Global Transceiver Clock Control Register
Global Framer and BERT Software Reset Register
Device Identification Register
Global Framer Interrupt Status Register
Global BERT Interrupt Status Register
Global LIU Interrupt Status Register
Global Framers Interrupt Mask Register
Global BERT Interrupt Mask Register
Global LIU Interrupt Mask Register
Global Transceiver Control Register 1
Global Transceiver Control Register 2
Reserved
Global LIU Software Reset Register
Reserved
Reserved
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DESCRIPTION
DS26528 Octal T1/E1/J1 Transceiver
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
R
R
R
R