DS26528GNA4 Maxim Integrated, DS26528GNA4 Datasheet - Page 189

• Manufacturer Part Number: DS26528GNA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GNA4

• Part # Aliases: 90-26528-NA4

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Firmware Revision (FR[7:0]). This read-only register reports the transmitter firmware revision.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: Also used to insert Fs framing pattern in D4 framing mode.
The Transmit FDL register (T1TFDL) contains the Facility Data Link (FDL) information that is to be inserted on a
byte basis into the outgoing T1 data stream. The LSB is transmitted first. In D4 mode, only the lower six bits are
used.
Bit 7: Transmit FDL Bit 7 (TFDL7). MSB of the transmit FDL code.
Bit 6: Transmit FDL Bit 6 (TFDL6).
Bit 5: Transmit FDL Bit 5 (TFDL5).
Bit 4: Transmit FDL Bit 4 (TFDL4).
Bit 3: Transmit FDL Bit 3 (TFDL3).
Bit 2: Transmit FDL Bit 2 (TFDL2).
Bit 1: Transmit FDL Bit 1 (TFDL1).
Bit 0: Transmit FDL Bit 0 (TFDL0). LSB of the transmit FDL code.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 5: Transmit BOC Bit 5 (TBOC5). MSB of the transmit BOC code.
Bit 4: Transmit BOC Bit 4 (TBOC4).
Bit 3: Transmit BOC Bit 3 (TBOC3).
Bit 2: Transmit BOC Bit 2 (TBOC2).
Bit 1: Transmit BOC Bit 1 (TBOC1).
Bit 0: Transmit BOC Bit 0 (TBOC0). LSB of the transmit BOC code.
TFDL7
FR7
—
7
0
7
0
7
0
TFRID
Transmit Firmware Revision ID Register
161h + (200h x n): where n = 0 to 7, for Ports 1 to 8
T1TFDL (T1 Mode)
Transmit FDL Register
162h + (200h x n): where n = 0 to 7, for Ports 1 to 8
T1TBOC (T1 Mode Only)
Transmit BOC Register
163h + (200h x n): where n = 0 to 7, for Ports 1 to 8
TFDL6
FR6
—
6
0
6
0
6
0
TBOC5
TFDL5
FR5
5
0
5
0
5
0
TBOC4
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TFDL4
FR4
4
0
4
0
4
0
TBOC3
TFDL3
FR3
3
0
3
0
3
0
DS26528 Octal T1/E1/J1 Transceiver
TBOC2
TFDL2
FR2
2
0
2
0
2
0
TBOC1
TFDL1
FR1
1
0
1
0
1
0
TBOC0
TFDL0
FR0
0
0
0
0
0
0