cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 83

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Figure 4-2. Segmentation Buffer Descriptor Chaining
4.2.2.4 Transmit Queues
28236-DSH-001-B
Segmentation Buffer
4.2.2.3 Host Linked
Descriptors
SAR Shared Memory
VCC_INDEX = 4
VCC_INDEX = 4
VCC_INDEX = 4
BUFF_PNTR
BUFF_PNTR
BUFF_PNTR
CONTROL
CONTROL
CONTROL
Figure 4-2
three-buffer message by linking three SBDs. In this example, the SAR transmits a
message sequence of buffer A, then buffer B, and finally buffer C as the end of
message.
Once the linked list of SBDs is complete, the host submits the chained message to
the SAR for segmentation. The host uses one of the 32 transmit queues for this
purpose. Each transmit queue is a circular queue of one-word entries. The host
identifies the next available transmit queue entry according to the write-only host
interface specification described in
pointer to the SAR-shared memory SBD onto the next available transmit queue
entry. During this write, the host also sets the VLD bit to indicate the entry is
valid.
When a write occurs to any of the transmit queues, the CN8236 marks that queue
as pending. Once every cell slot, the CN8236 services one queue entry from one
Transmit Queue. The system designer selects one of two service order priority
schemes. With the SEG_CTRL(TX_RND) bit set to 1, the CN8236 services
queues in round-robin order (that is, one entry per queue in transmit queue
sequence for all active queues). With the SEG_CTRL(TX_RND) bit set to 0, the
CN8236 services the queues in fixed priority order (that is, entries from higher
priority active queues are serviced before lower priority queue entries, with
transmit queue 31 having highest priority).
<BOM>
<COM>
<EOM>
(NULL)
NEXT
NEXT
NEXT
SBDs
The CN8236 detects this write by snooping SAR-shared memory accesses.
Mindspeed Technologies
illustrates an example of SBD chaining. The host has formed a
Host (or SAR Shared) Memory
Section
™
3.3.1. The host processor writes a
4.2 Segmentation Functional Description
Buffers
A
C
B
4.0 Segmentation Coprocessor
8236_013
4-5