cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 411

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cn8236

Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

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CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Table A-2. IEEE Std. 1149.1 Instructions
28236-DSH-001-B
Bit 3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A.1 Instruction Register
The Instruction register is a 4-bit register with no parity. When the boundary scan
circuitry is reset, the IR is loaded with the binary value b1111, which is
equivalent to the BYPASS Instruction value. The Capture-IR binary value is
b0001, and is shifted out TDO as the IR is loaded.
instructions (BYPASS, EXTEST, and SAMPLE/PRELOAD) and thirteen private
instructions for manufacturing use only. Bit-0 (LSB) is shifted into the instruction
register first.
NOTE:
The sixteen instructions include three IEEE 1149.1 mandatory public
The implementation of this register as described is applicable only to
Rev. A of CN8236 device.
Mindspeed Technologies
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Table A-2
EXTEST
RSTHIGH - Private
SAMPLE/PRELOAD
TMWAFIFO - Private
TMWBFIFO - Private
TMRFIFO - Private
TSEGFIFO - Private
TRSMFIFO - Private
T38AFIFO - Private
T38VBFIFO - Private
RSVD0 - Private
RSVD1 - Private
RSVD2 - Private
RSVD3 - Private
PM_EN - Private
BYPASS
shows the bit settings for this register.
Instruction
Appendix A: Boundary Scan
Register Accessed
Boundary Scan
Boundary Scan
Boundary Scan
Boundary Scan
A.1 Instruction Register
A-3

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