cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 346

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

14.0 CN8236 Registers
14.6 Counters and Status Registers
Table 14-3. 0x1c0—Host Processor Interrupt Status Register 0 (HOST_ISTAT0)
14-30
25–24
21–19
14–12
8–4
Bit
31
30
29
28
27
26
23
22
18
17
16
15
11
10
9
3
2
1
0
Field
Size
1
1
1
1
1
1
2
1
1
3
1
1
1
1
3
1
1
1
5
1
1
1
1
Type
—
—
—
—
—
—
—
L
L
E
E
L
E
L
L
E
L
L
E
E
E
E
E
PFAIL
PHY_INTR
Reserved
HOST_MBOX_
WRITTEN
LP_MBOX_READ
Reserved
Reserved
Reserved
HSTAT1
Reserved
GFC_LINK
RSM_RUN
RSM_HS_WRITE
RSM_LS_WRITE
Reserved
SEG_RUN
SEG_HS_WRITE
SEG_LS_WRITE
Reserved
AAL5_DSC_RLOVR
CELL_DSC_RLOVR
CELL_RCVD_RLOVR
CELL_XMT_RLOVR
Mindspeed Technologies
Name
ATM ServiceSAR Plus with xBR Traffic Management
Reflects inverted state of processor PFAIL* input.
In standalone operation, this bit reflects the inverted state
of the PDAEN* input. PHY_INTR can be connected to a
PHY interrupt source.
Read as 0.
This bit is set upon a write to the HOST_MBOX register
by the local processor, and cleared by a read of the
HOST_MBOX register.
This bit is set upon the read of the LP_MBOX register by
the local processor.
Read as 0.
Read as 0.
Read as 0. Reserved for future status page expansion.
This bit is set when any bit in HOST_ISTAT1 is set.
Read as 0.
Set when three consecutive received cells have GFC
SET_A, SET_B, or HALT bits set.
Set when the reassembly machine is running. Is high
when the RSM Coprocessor is processing a cell.
Indicates reassembly host status has been written by
CN8236 to status queues 0 through 15. For queue
number, read HOST_ST_WR, which must be read in
order to clear status bit.
Indicates reassembly local status has been written by
CN8236.
Read as 0.
Set when the segmentation machine is running. Is high
when SEG_ENABLE bit in SEG_CTRL is high or when
processing the last cell after SEG_ENABLE is low.
Indicates segmentation host status has been written by
the CN8236 to status queues 0 through 15. For queue
number, read HOST_ST_WR which must be read in order
to clear status bit.
Indicates that a segmentation local status queue has
been written by the CN8236.
Read as 0.
Set on the occurrence of an AAL5_DSC_CNT rollover.
Set on the occurrence of a CELL_DSC_CNT rollover.
Set on the occurrence of a CELL_RCVD_CNT rollover.
Set on the occurrence of a CELL_XMIT_CNT rollover.
™
Description
28236-DSH-001-B
CN8236