cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 135

no-image

cn8236

Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cn8236EBGB
Manufacturer:
VIA
Quantity:
150
Part Number:
cn8236EBGB
Manufacturer:
CONEXANT
Quantity:
329
CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Suppression on Multicast
5.4.8.5 DMA FIFO Buffer
28236-DSH-001-B
Packet Discard—Echo
5.4.8.4 LANE-LECID
Data Frames
Full
The system designer can use this feature to discard superfluous traffic on the
ATM network caused by LAN Emulation Clients (LECs) transmitting multicast
frames, that is, point-to-multipoint Emulated LAN traffic.
LANE-LECID discard function for that VCC is enabled, and the functions below
are performed:
The purpose of this function is to allow a graceful recovery from an incoming
DMA FIFO buffer full condition. Without this function, the reassembly
coprocessor is stalled when the FIFO buffer is full until recovery from the full
condition. This causes the cells to be dropped indiscriminately on the upstream
side of the reassembly block without any record of which VCCs the cells
belonged to. Upon recovery from the full condition, cells belonging to corrupted
PDUs continue to be processed, which wastes PCI bandwidth during the recovery
phase. This function provides for a more efficient use of host and SAR resources
by allowing the reassembly block to process and drop cells during the full
condition.
condition for subsequent early packet discard. Upon recovery from the full
condition, the reassembly block performs early packet discard on the appropriate
channels as cells are received on those channels. In addition, cells continue to be
dropped on each channel until after an EOM cell is received for that channel.
Early packet discard processing is delayed until recovery from the full condition,
since the status entry also requires the use of the incoming DMA FIFO buffer.
logic high.
descriptors, and RSM status queues reside in SAR-shared memory.
(OAM_FF_DSC) should be set to a logic high.
descriptors, and status queues reside in SAR-shared memory.
FFPD bit in the RSM status queue entry being a logic high.
If the LECID_EN bit in the RSM VCC table is a logic high, the
• The DPRI field is used as an index into the LECID table. This allows
• When the RSM coprocessor receives a BOM cell with this function
• If the SERV_DIS counter rolls over, the CNT_ROVR bit in the next status
The reassembly block marks all channels that receive a cell during the full
This function is enabled by setting the FF_DSC bit in each VCC entry to a
The user can want to disable this function if the free buffers, buffer
Similarly, if RSM_CTRL1(OAM_QU_EN) is a logic high, RSM_CTRL1
The user can want to disable this function if the global OAM buffers, buffer
Early packet discard due to a FIFO buffer full condition is indicated by the
support for up to 32 LECIDs, each a unique identifier for a single LAN
Emulation Client.
enabled, it checks the 16-bit LECID field in the LANE header against the
value in the LECID table. If a match occurs, the RSM coprocessor discards
the cell, marks the rest of the packet for discard, and increments the
SERV_DIS counter in the VCC table.
entry for this channel is set to a logic high. The CNT_ROVR bit in the
VCC table holds this flag information until a status is sent.
Mindspeed Technologies
5.0 Reassembly Coprocessor
5.4 Buffer Management
5-25

Related parts for cn8236