cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 269

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
10.4 Processor Interface Signals
Figure 10-7
i960CA/CF processor. The memory region decoded for PCS* should be set for
N
wait state SRAM), and N
enabled, and burst can be enabled or disabled at the system designer’s option.
Pulling up the i960 CLKMODE input to a logic 1 selects the divide-by-one clock
mode, making i960 PCLK synchronous to SYSCLK.
RAD
and N
Mindspeed Technologies
illustrates the signal interface between the CN8236 device and the
WAD
= 2, N
RDD
XDA
and N
= 1. In addition, external ready control must be
WDD
= 0 or 1 (depending on the use of 0 or 1
™
10.0 Local Processor Interface
10.4 Processor Interface Signals
10-11