cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 60

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cn8236

Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

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2.0 Architecture Overview
2.10 Logic Diagram and Pin Descriptions
Figure 2-11. CN8236 Logic Diagram (1 of 3)
2-26
Address/Data Command Parity
Transaction Target Ready
Transactor Initiator Ready
Bus Device Acknowledge
AALx FIFO Read Strobes
Transaction Termination
Command/Byte Enable
Bus Device Slot Select
Address/Data Bus
Bus Parity Error
Switch Indicator
Framing Signal
Bus Signalling
System Reset
Bus Grant
Bus Clock
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
AB26
C23
A25
D23
C24
B26
C25
G25
F25
F24
F23
E26
E23
D26
D25
D24
T23
N26
K23
F26
K24
M25
M24
M23
L25
L26
T24
Y25
L24
N23
Y23
W24
W25
W26
V24
V25
V26
U23
U24
T25
R23
R24
R25
R26
P24
P25
P26
J26
J25
J24
H25
H24
H23
G26
F3
Mindspeed Technologies
HAD31
HAD30
HAD29
HAD28
HAD27
HAD26
HAD25
HAD24
HAD23
HAD22
HAD21
HAD20
HAD19
HAD18
HAD17
HAD16
HAD15
HAD14
HAD13
HAD12
HAD11
HAD10
HAD9
HAD8
HAD7
HAD6
HAD5
HAD4
HAD3
HAD2
HAD1
HAD0
HC/BE3*
HC/BE2*
HC/BE1*
HC/BE0*
HPAR
HFRAME*
HIRDY*
HTRDY*
HSTOP*
HDEVSEL*
HIDSEL
HGNT*
HPERR*
HCLK
HRST*
PCI5V
HSWITCH*
HFIFORD5
HFIFORD4
HFIFORD3
HFIFORD2
HFIFORD1
HFIFORD0
Interworking
Signals
PCI Interface
AALx
Signals
Host
ATM ServiceSAR Plus with xBR Traffic Management
HFIFOWR5
HFIFOWR4
HFIFOWR3
HFIFOWR2
HFIFOWR1
HFIFOWR0
HENUM*
HSERR*
HLED*
HREQ*
HINT*
Y26
AA25
L23
L4
B23
D1
D2
D3
C2
E3
F4
OD
OD
OD LED Power
OD ENUM#
O
I
AALx FIFO Write Strobes
Arbiter Bus Request
Interrupt Request
System Error
28236-DSH-001-B
CN8236
8236_098

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