cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 160

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.7 Reassembly Control and Data Structures
Table 5-19. Free Buffer Queue Base Table Entry Descriptions
Table 5-21. Free Buffer Queue Entry Descriptions
5-50
Table 5-20. Free Buffer Queue Entry Format
NOTE(S):
(1)
UPDATE
EMPT
BFR_LOCAL
READ
LENGTH
BD_LOCAL
FORWARD
READ_UD_PNTR
BUFFER_PNTR
BD_PNTR
VLD
Reserved
FWD_VLD
VCC_INDEX
Word
2
3
These words are used only in Bank 0 if RSM_FBQCTL(FBQ0_RTN) = 1.
0
1
(1)
(1)
Field Name
Field Name
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read Index Pointer Update Interval counter.
Free buffer queue Empty flag. Used to indicate that an appropriate status entry has been written to
indicate the empty condition.
If logic high, cell buffers located in SAR-shared memory, otherwise in host memory.
Current READ index pointer.
Length in bytes of buffers in queue. Even though LENGTH is in bytes, the user must set the length to a
mod-32 bit boundary.
If logic high, buffer descriptor and READ_UD word are located in SAR-shared memory, otherwise in
host memory.
Current Forward processing Read index pointer (firewalling).
Word address in user memory to write READ pointer every UPDATE interval.
Pointer to beginning of cell buffer.
Pointer to corresponding cell buffer descriptor.
Free buffer Valid Bit. If high, location has a valid free buffer.
Always set to 0.
Forward Valid. If logic high, word contains valid buffer return information.
Channel of corresponding buffer return.
Reserved
Table 5-20
Mindspeed Technologies
and
Table 5-21
BD_PNTR
BUFFER_PNTR
(not used)
Description/Function
Description/Function
describe the format of the free buffer queue entries.
ATM ServiceSAR Plus with xBR Traffic Management
™
VCC_INDEX
28236-DSH-001-B
CN8236