cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 57

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cn8236

Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

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CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
2.7 Implementation of OAM-PM Protocols
The CN8236 provides internal support for the detection and generation of OAM
traffic, including PM OAM.
monitors up to 128 channels and generates in-rate PM-OAM cells.
SAR-shared memory segmentation and reassembly. The user can thus route OAM
traffic, including PM traffic, to and from this optional local processor, thereby
off-loading ATM network management from the host. To facilitate this, the
CN8236 provides the option of user-defined global status queues for both
segmentation and reassembly and a global buffer queue for reassembly, to which
the user can assign SAR-shared memory addresses. The CN8236 then processes
OAM traffic via the local processor, thereby isolating the host from these
management functions and focusing host processing power on ATM user data
traffic.
2.8 Standards-Based I/O
PCI Bus I/O
The PCI bus interface implements the full set of address, data, and control signals
required to drive the PCI bus as a master, and contains the logic required to
support arbitration for the PCI bus. This interface is PCI Version 2.1-compliant.
PCI core to connect to a serial EEPROM. This 128-byte EEPROM is used to store
specific PCI configuration information, loaded into the PCI configuration space
at reset. This allows for several user-configurable features:
ATM PHY I/O
The CN8236’s ATM PHY interface communicates with and controls the ATM
link interface device, which carries out all the transmission convergence and PHY
media-dependent functions defined by the ATM protocol. Two modes of
operation are provided: standard UTOPIA and slave UTOPIA. Standard UTOPIA
mode conforms to both UTOPIA Level 1 and Level 2 standards for ATM Layer
devices. Slave UTOPIA mode reverses the control direction for use in place of a
PHY on switch fabrics.
The CN8236 supports the F4 and F5 OAM flows according to I.610. It
The CN8236 includes a Local Processor Interface, providing the capability of
The PCI bus interface also includes an I
• User control of the size of the memory block for PCI addresses
• Enabling byte swapping of control words across the PCI bus
• Loading of Subsystem ID and Subsystem Vendor ID
Mindspeed Technologies
2
C Interface module that allows the
2.7 Implementation of OAM-PM Protocols
2.0 Architecture Overview
2-23

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