cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 41

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Figure 2-5. Segmentation Buffer Isolation—Data Buffers Separated from Descriptors
28236-DSH-001-B
LEGEND:
Host Memory
Data Buffers
2
Associations (Pointing Function)
Data Reads
Host Actions
SAR Actions
(Write)
1
3
to the transmit queue for segmentation. The process is as follows:
Figure 2-5
1.
2.
3.
The host links the buffer descriptors (in SAR-shared memory) for the
associated data buffers (in host memory) containing the PDU to be
segmented.
The host then formats a 2-word transmit queue entry and writes this entry
to the transmit queue. The location of the first buffer descriptor in the
linked chain is contained in the transmit queue entry.
The segmentation coprocessor automatically senses the presence of new
transmit queue entries, reads them, and schedules the new data for
transmission. The transmit queue acts as a FIFO buffer for segmentation
task pointers.
Mindspeed Technologies
PCI
illustrates how the host submits linked data buffers (that is, PDUs)
SEG Buffer
Descriptors
(Read)
2.2 High Performance Host Architecture with Buffer Isolation
1
2
3
(Write)
™
(Read)
SEG Coprocessor
2.0 Architecture Overview
Transmit
Queues
CN8236
(Read)
SEG Memory
8236_005
2-7