zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 87

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

12.3.6
12.3.6.1
I²C Address h04B; CPU Address:h500
Accessed by CPU and I
12.3.6.2
I
Accessed by CPU and I
2
C Address h068, CPU Address: 510
(Group 5 Address) Buffer Control/QOS Group
Bit [0]:
Bit [1]:
Bits [4:2]:
Bit [5]:
Bit [6]:
Bit [7]:
Bit [5]
Bit [6]:
Bit [7]:
Bits [7:0]:
QOSC – QOS Control
UCC – Unicast Congestion Control
2
2
C (R/W)
C (R/W)
ARP report control
0 - No ARP packet reporting (Default)
1 - Report ARP packet to CPU
Disable MCT speed-up aging
0 – Enable speed-up aging when MCT resource is low. (Default)
1 – Disable speed-up aging when MCT resource is low.
Slow Learning
0 – Learning is performed independent of search demand (Default)
1 – Enable slow learning. Learning is temporary disabled when search
demand is high
Number of frame count. Used for best effort dropping at B% when destination
port’s best effort queue reaches UCC threshold and shared pool is all in use.
Granularity is 16 granule (Default 0x6)
0 – Disable (Default)
1 – Enable
0 – Disable (Default)
1 – Enable
Reserved
Select VLAN tag or TOS (IP packets) to be preferentially picked to map
transmit priority and drop priority
0 – Select VLAN Tag priority field over TOS (Default)
1 – Select TOS over VLAN tag priority field
Select TOS bits for Priority
0 – Use TOS [4:2] bits to map the transmit priority (Default)
1 – Use TOS [7:5] bits to map the transmit priority
Select TOS bits for Drop priority
0 – Use TOS [4:2] bits to map the drop priority (Default)
1 – Use TOS [7:5] bits to map the drop priority
Enable TX rate control (on RMAC ports only)
Enable RX rate control (on RMAC ports only)
Zarlink Semiconductor Inc.
ZL50405
87
Data Sheet