zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 69

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

Port 8: (CPU Port)
Bit [5]
Bits [7:6]
8/16-bit or Serial Only Modes
Bit [5:0]
Bits [7:6]
Serial + MII Mode
Bit [0]
Bit [1]
Bit [2]
Bit [3]
Bit [4]
Bit [5]
Asymmetric Flow Control Enable.
0 – Disable asymmetric flow control (Default)
1 – Enable Asymmetric flow control
When this bit is set and flow control is on (bit [0] = 0), the device does not send out
flow control frames, but it’s receiver interprets and processes flow control frames.
SS - Spanning tree state (IEEE 802.1D spanning tree protocol)
00 - Blocking:
01 - Listening:
10 - Learning:
11 - Forwarding:
Reserved
SS - Spanning tree state (IEEE 802.1D spanning tree protocol)
00 - Blocking:
01 - Listening:
10 - Learning:
11 - Forwarding:
Flow Control
0 - Enable (Default)
1 - Disable
Duplex Mode
Must be 0 - Full Duplex (Default)
Speed
0 - 100 Mbps (Default)
1 - 10 Mbps
1 - MII Port Up
0 - MII Port Down
Note: Bit [4] must be ‘1’.
Must be ‘1’.
Asymmetric Flow Control Enable.
0 – Disable asymmetric flow control (Default)
1 – Enable Asymmetric flow control
When this bit is set and flow control is on (bit [0] = 0), the device does not send out
flow control frames, but it’s receiver interprets and processes flow control frames.
The configuration in ECR1Pn[2:0] is used for (speed/duplex/flow control)
setup.
Frame is dropped
Frame is dropped
Frame is dropped. Source MAC address is learned.
Frame is forwarded. Source MAC address is learned. (Default)
Frame is dropped
Frame is dropped
Frame is dropped. Source MAC address is learned.
Frame is forwarded. Source MAC address is learned. (Default)
Zarlink Semiconductor Inc.
ZL50405
69
Data Sheet