zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 64

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zl50405

Manufacturer Part Number
zl50405
Description
Managed5-port 10/100 M Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
8. Per Port QOS Control
FCRn
BMRCn
PR100_n
PR100_CPU
PRM
PTH100_n
PTH100_CPU
PTHM
QOSCn
E. System Diagnostic
DTSRL
DTSRM
TESTOUT0
TESTOUT1
MASK0
MASK1
MASK2
MASK3
MASK4
BOOTSTRAP[2:0]
PRTFSMSTn
PRTQOSSTn
Register
Flooding Control Register n
Broadcast/Multicast Rate
Control n
Port Reservation for RMAC
Ports (n=0..3)
Port Reservation for CPU
Port
Port Reservation for MMAC
Port
Port Threshold for RMAC
Ports (n=0..3)
Port Threshold for CPU
Port
Port Threshold for MMAC
Port
QOS Control n
Test Register Low
Test Register Medium
Testmux Output [7:0]
Testmux Output [15:8]
MASK Timeout 0
MASK Timeout 1
MASK Timeout 2
MASK Timeout 3
MASK Timeout 4
BOOTSTRAP Read Back
Ethernet Port n Status
Read Back
RMAC Port n QOS and
Queue Status
Table 13 - Register Description (continued)
Description
Zarlink Semiconductor Inc.
ZL50405
64
CPU Addr
E80-E82
EA0+n
800+n
820+n
840+n
860+n
E90+n
880+n
(Hex)
E00
E01
E02
E03
E10
E12
E13
E14
848
849
868
869
E11
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/O
R/O
RO
RO
RO
078-08F
04C+n
0C2+n
05E+n
06A+n
(Hex)
Addr
0CB
0CA
0FA
073
072
0F6
0F7
0F8
0F9
I²C
NA
NA
NA
NA
NA
NA
NA
NA
Default
000
000
006
006
024
003
003
012
000
000
001
000
000
000
000
000
NA
NA
NA
NA
NA
Data Sheet
(n=0..3,8,
9)
‘d96x6=‘d
‘d96>>4=
‘d576>>4
(n=0..3,8,
(n=0..39)
‘d1536/1
(n=0..3)
6=‘d96,
Notes
=’h24
‘d96
576,
’h6
9)
½
½
½

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