zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 80

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

12.3.3.6
CPU Address:h228+2n (n = hash value)
Accessed by CPU (R/W)
12.3.3.7
CPU Address:h229+2n (n = hash value)
Accessed by CPU (R/W)
12.3.4
MAC5 to MAC0 registers form the CPU MAC address. When a packet with destination MAC address match MAC
[5:0], the packet is forwarded to the CPU. The default MAC address is 00-00-00-00-00-00.
12.3.4.1
CPU Address:h300
Accessed by CPU (R/W)
Bits [7:0]:
Bits [3:0]:
Bit[7:4]:
Bits [1:0]:
Bit [2]:
Bits [5:3]:
Bits [7:6]:
(Group 3 Address) CPU Port Configuration Group
MULTICAST_HASHn-0 – Multicast hash result 0~7 mask byte 0
MULTICAST_HASHn-1 – Multicast hash result 0~7 mask byte 1
MAC0 – CPU MAC address byte 0
47
MAC5
Port 9-8 bit map for multicast hash. (Default 0x3)
Reserved (Default 0x1)
Reserved (Default 0x7)
MULTICAST_HASH0-1
Hash Select. The hash algorithm selected is valid for all trunks
00 - Use Source and Destination MAC Address for hashing
01 - Use Source MAC Address for hashing
10 - Use Destination MAC Address for hashing
11 - Use Source Port Number for hashing (Default)
MULTICAST_HASH[7:1]-1
Reserved (Default 0x3)
Port 3-0 bit map for multicast hash. (Default 0xF)
Reserved. (Default 0xF)
Byte 0 (bits [7:0]) of the CPU MAC address (Default 0)
MAC4
MAC3
Zarlink Semiconductor Inc.
ZL50405
MAC2
80
MAC1
MAC0
0
(MC bit)
Data Sheet