SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 97

IC UART W/FIFO 48-TSSOP

SC28L201A1DGG,118

Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L201A1DGG,118

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
Philips Semiconductors
9397 750 13138
Product data sheet
Fig 5. Active area in 68000 mode
Fig 6. Reset timing (80xxx mode)
a. Intel-type bus
b. Motorola-type:
Remark: In the 68000 mode, the write occurs on the rise of CEN or fall of DACKN, whichever occurs first.
RDN, RWN
RESET
DACKN
R/WN
CEN
CEN
CEN
CEN
R/WN (write)
R/WN (read)
RDN, RWN
RDN, RWN
RDN, RWN
CEN
CEN
t
w(RESET)
002aab473
Rev. 01 — 31 October 2005
active area
active area
Fig 7. Reset timing (68000 mode)
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
RESETN
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
t
w(RESET)
002aab471
002aab472
SC28L201
002aab474
DACKN
not used
when
DACKN
controls
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