SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 51

• Manufacturer Part Number: SC28L201A1DGG,118
• Description: IC UART W/FIFO 48-TSSOP
• Manufacturer: NXP Semiconductors
• Series: IMPACTr

Specifications of SC28L201A1DGG,118

• Features: False-start Bit Detection
• Number Of Channels: 2, DUART
• Fifo's: 256 Byte
• Voltage - Supply: 3.3V, 5V
• With Parallel Port: Yes
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935277824118; SC28L201A1DGG-T; SC28L201A1DGG-T

Philips Semiconductors
9397 750 13138
Product data sheet
8.2.6 Command Register Extension (CRx)
CR is used to write commands to the UART.
Table 23:
Bit
7
6
5
Symbol
CRx - Command Register Extension (address 0x12) bit description
Description
Lock Tx and Rx enables.
Remark: Receiver or transmitter disable is not the same as receiver or
transmitter reset.
Writes to the lower 5 bits of the CR would usually have CR[7] at ‘0’ in
order to maintain the enable/disable condition of the receiver and transmitter.
The bit provides a mechanism for writing commands to a channel, via
CR[4:0], without the necessity of keeping track of or reading the current
enable status of the receiver and transmitter.
Enable Tx. Enable transmitter.
A one written to this bit enables operation of the transmitter. The TxRDY
status bit will be asserted. When disabled by writing a zero to this bit, the
command terminates transmitter operation and resets the TxRDY and
Tx Idle status bits returning the transmitter to its idle state. However, if a
character is being transmitted or if characters are loaded in the TxFIFO when
the transmitter is disabled, the transmission of the all character(s) is
completed before assuming the inactive state.
Enable Rx. Enable receiver.
A one written to this bit enables operation of the receiver. The receiver
immediately begins the search for and the verification the start bit. If a zero is
written, this command terminates operation of the receiver immediately-a
character being received will be lost. The command has no effect on the
receiver status bits or any other control registers. The data in the RxFIFO will
be retained and may be read. If the receiver is re-enabled subsequent data
will be appended to that already in the RxFIFO. If the special Wake-up mode
is programmed, the receiver operates even if it is disabled (see
7.4.7.6 “Wake-up
0 = lock Rx and Tx state. Prevents changing transmitter and receiver
enable bits while writing to the lower 5 bits of the command register. Bits
CR[6:5] are not changed.
1 = change Rx and Tx state. Allows the receiver and transmitter enable
bits to be changed while issuing a command to the Command Register.
0 = disable
1 = enable
0 = disable
1 = enable
Rev. 01 — 31 October 2005
mode”).
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
Section
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