SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 53

• Manufacturer Part Number: SC28L201A1DGG,118
• Description: IC UART W/FIFO 48-TSSOP
• Manufacturer: NXP Semiconductors
• Series: IMPACTr

Specifications of SC28L201A1DGG,118

• Features: False-start Bit Detection
• Number Of Channels: 2, DUART
• Fifo's: 256 Byte
• Voltage - Supply: 3.3V, 5V
• With Parallel Port: Yes
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935277824118; SC28L201A1DGG-T; SC28L201A1DGG-T

Philips Semiconductors
9397 750 13138
Product data sheet
Table 23:
Bit
4:0
(cont.)
Symbol
CRx - Command Register Extension (address 0x12) bit description
Description
1 0000: Transmit an Xon character.
1 0001: Transmit an Xoff character.
1 0010: C/T start sets the counter timer to the value of the Counter/Timer
Preset Register and starts the counter.
1 0011: C/T stop. Effectively stops the counter/timer, captures the last
count value and resets the counter ready status bit in the ISR.
1 0100: reserved
1 0101: reserved
1 0110: Transmitter resume command (this command is not active in
‘Auto-Transmit mode’). A command to cancel a previous Host Xoff
command. Upon receipt, the channels transmitter will transfer a character,
if any, from the TxFIFO and begin transmission.
1 0111: Host Xoff (or transmitter pause) command (CRTXoff). This
command allows tight host CPU control of the flow control of the channel
transmitter. When interrupted for receipt of an Xoff character by the
receiver, the host may stop transmission of further characters by the
channel transmitter by issuing the Host Xoff command. Any character that
has been transferred to the TXD shift register will complete its
transmission, including the stop bit before the transmitter pauses. Even
though the transmitter is paused it is still able to send Xon/Xoff by the
request of its associated receiver.
1 1000: Cancel Host transmit flow control command. Issuing this
command will cancel a previous command to transmit a flow control
character if the flow control character is not yet loaded into the TXD Shift
Register. If there is no character waiting for transmission, or if its
transmission has already begun, then this command has no effect and the
character will be sent.
1 1001: reserved
1 1010: reserved
1 1011: Reset Address Recognition Status. This command clears the
interrupt status that was set when an address character was recognized by
a disabled receiver operating in the special mode.
1 1100: reserved
1 1101: Block error status accumulates on FIFO read (default state).
1 1110: reserved
1 1111: Executes a chip wide reset. Executing this command in Channel A
is equivalent to a hardware reset with the RESET(N) pin.
Rev. 01 — 31 October 2005
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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