SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 70

• Manufacturer Part Number: SC28L201A1DGG,118
• Description: IC UART W/FIFO 48-TSSOP
• Manufacturer: NXP Semiconductors
• Series: IMPACTr

Specifications of SC28L201A1DGG,118

• Features: False-start Bit Detection
• Number Of Channels: 2, DUART
• Fifo's: 256 Byte
• Voltage - Supply: 3.3V, 5V
• With Parallel Port: Yes
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935277824118; SC28L201A1DGG-T; SC28L201A1DGG-T

Philips Semiconductors
9397 750 13138
Product data sheet
8.5.3 Current Interrupt Register (CIR)
Table 48:
The Current Interrupt Register is provided to speed up the specification of the interrupting
condition in the UART. The CIR is updated at the beginning of an interrupt acknowledge
bus cycle or in response to an Update CIR command (see
interrupt arbitration continues in the background, the current interrupt information remains
frozen in the CIR until another IACKN cycle or Update CIR command occurs. The LSBs of
the CIR provide part of the addressing for various Global Interrupt registers including the
GIBCR, GICR, GITR and the Global RxFIFO and TxFIFO FIFO. The host CPU need not
generate individual addresses for this information since the interrupt context will remain
stable at the fixed addresses of the Global Interrupt registers until the CIR is updated. For
most interrupting sources, the data available in the CIR alone will be sufficient to set up a
service routine.
The CIR may be processed as follows:
Bit
7:6
5:1
0
If CIR[7] = 1, then a receiver interrupt is pending and the count is CIR[5:1], channel is
CIR[0]
Else if CIR[6] = 1 then a transmitter interrupt is pending and the count is CIR[5:1],
channel is CIR[0]
Symbol
CIR - Current Interrupt Register (address 0x61) bit description
Description
Type
Current byte count/type. When CIR[7:6] = 00:
Current count code. When CIR[7:6] = 01, 10, or 11:
Channel number or C/T number
Rev. 01 — 31 October 2005
00 = type other than transmit or Receiver
01 = transmit
10 = receive without errors
11 = receive with errors
0 0000 = no interrupt
0 0001 = change-of-state
0 0010 = address recognition
0 0011 = Xon/Xoff status
0 0100 = Receiver watchdog
0 0101 = break change
0 0110 = Counter/Timer
0 0111 = Rx Loopback error
0 0000 => at least 1 character
0 0001 => at least 16 characters
0 0010 => at least 24 characters
1 1101 => at least 240 characters
1 1110 => at least 248 characters
1 1111 => 256 (see also
Register
0 = Channel A or C/T 0
1 = C/T 1
(GIBCR)”)
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
Section 8.5.6 “Global Interrupting Byte Count
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Section
8.5.2). Although
SC28L201
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