SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 73

• Manufacturer Part Number: SC28L201A1DGG,118
• Description: IC UART W/FIFO 48-TSSOP
• Manufacturer: NXP Semiconductors
• Series: IMPACTr

Specifications of SC28L201A1DGG,118

• Features: False-start Bit Detection
• Number Of Channels: 2, DUART
• Fifo's: 256 Byte
• Voltage - Supply: 3.3V, 5V
• With Parallel Port: Yes
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935277824118; SC28L201A1DGG-T; SC28L201A1DGG-T

Philips Semiconductors
9397 750 13138
Product data sheet
8.5.10 Bidding Control Register, Break Change (BCRBRK)
8.5.11 Bidding Control Register, Change-Of-State (BCRCOS)
8.5.12 Bidding Control Register, Xon/Xoff (BCRx)
8.5.13 Bidding Control Register, Address (BCRA)
8.5.14 Bidding Control Register, C/T 0 and C/T 1 (BCR C/T)
8.5.15 Bidding Control Register, Received Loopback Error (BCRLBE)
This register provides the 8 MSBs of the Interrupt Arbitration number for a break change
interrupt.
Table 55:
This register provides the 8 MSBs of the Interrupt Arbitration number for a
Change-Of-State, COS, interrupt.
Table 56:
This register provides the 8 MSBs of the Interrupt Arbitration number for an Xon/Xoff
interrupt.
Table 57:
This register provides the 8 MSBs of the Interrupt Arbitration number for an address
recognition event interrupt.
Table 58:
This register provides the 8 MSBs of the Interrupt Arbitration number for a counter/timer
event interrupt.
Table 59:
This register provides the 8 MSBs of the Interrupt Arbitration number for the received
loopback error interrupt.
Table 60:
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
BCRBRK - Bidding Control Register, Break change (address 0x50) bit description
BCRCOS - Bidding Control Register, Change-Of-State (address 0x51)
bit description
BCRx - Bidding Control Register, Xon/Xoff (address 0x53) bit description
BCRA - Bidding Control Register, Address (address 0x54) bit description
BCRA - Bidding Control Register, Address (address 0x52) bit description
BCRLBE - Bidding Control Register, Address (address 0x55) bit description
Description
MSBs of break change interrupt bid.
Description
MSBs of Change-Of-State detectors (COS) interrupt bid.
Description
MSBs of an Xon/Xoff interrupt bid.
Description
MSBs of an address recognition event interrupt bid.
Description
MSBs of a Counter/Timer event interrupt bid.
Description
MSBs of a received loopback error event interrupt bid.
Rev. 01 — 31 October 2005
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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