MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 317

• Manufacturer Part Number: MPC8536-RDK
• Description: BOARD REF COMEXPRESS MPC8536
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536-RDK

• Contents: CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.4.1.22
The DDR Self Refresh Counter register can be programmed to force the DDR controller to enter self
refresh after a predefined period of idle time.
Freescale Semiconductor
Offset 0x17C
Reset
24–27
28–31
Bits
W
R
0
WRLVL_START Write leveling start time. Determines the value to use for the DQS_ADJUST for the first sample
Name
DDR Self Refresh Counter (DDR_SR_CNTR)
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 8-23. DDR Self Refresh Counter Register (DDR_SR_CNTR)
Table 8-27. DDR_WRLVL_CNTL Field Descriptions (continued)
Reserved, should be cleared.
when write leveling is enabled.
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101-11111Reserved
—
0 clock delay
1/8 clock delay
1/4 clock delay
3/8 clock delay
1/2 clock delay
5/8 clock delay
3/4 clock delay
7/8 clock delay
1 clock delay
9/8 clock delay
5/4 clock delay
11/8 clock delay
3/2 clock delay
13/8 clock delay
7/4 clock delay
15/8 clock delay
2 clock delay
17/8 clock delay
9/4 clock delay
19/8 clock delay
5/2 clock delay
11 12
SR_IT
All zeros
15 16
Description
—
DDR Memory Controller
Access: Read/Write
8-43
31