MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 1309

Manufacturer Part Number

BOARD REF COMEXPRESS MPC8536

Manufacturer

Freescale Semiconductor

PowerQUICC ™r

CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Freescale Semiconductor

Offset: 0x050 (FEVT)

Force event card interrupt. Writing 1 to this bit generates a low-level short pulse on the internal

SDHC_DAT[1] line, which imitates a self-clearing interrupt from the external card. If enabled,

IRQSTAT[CINT] is set and the interrupt service routine may treat this interrupt as a normal interrupt from

the external card.

Force event DMA error. Forces IRQSTAT[DMAE] to set.

Force event Auto CMD12 error. Forces IRQSTAT[AC12E] to set.

Force event data end bit error. Forces IRQSTAT[DEBE] to set.

Force event data CRC error. Forces IRQSTAT[DCE] to set.

Force event data time out error. Forces IRQSTAT[DTOE] to set.

Force event command index error. Forces IRQSTAT[CCE] to set.

Force event command end bit error. Forces IRQSTAT[CEBE] to set.

Force event command CRC error. Forces IRQSTAT[CCE] to set.

Force event command time out error. Forces IRQSTAT[CTOE] to set.

MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1

Figure 20-18. Force Event Register (FEVT)

Table 20-24. FEVT Field Descriptions

Enhanced Secure Digital Host Controller

Access: Write