MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 1512

Manufacturer Part Number

BOARD REF COMEXPRESS MPC8536

Manufacturer

Freescale Semiconductor

PowerQUICC ™r

CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Global Utilities

CORE_SPD Requested core clock speed

describes PMJCR fields.

MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1

Requested clock ratio between e500 core and CCB clock:

000010 Reserved

001001 Reserved

Default value is the same as PORPLLSR[e500_Ratio].

The value written to this register takes effect when the system wakes from deep sleep or when

a jog mode request is initiated.

Note that if this register has been written by software, but deep sleep has not occurred , then the

value in this register may not necessarily reflect the current clock ratio between the e500 core

and CCB clock.

0 Core frequency at or below 800 MHz

1 Core frequency above 800 MHz

Default value is the same as PORDEVSR[CORE_SPD].

The value written to this register takes effect when the system wakes from deep sleep or when

a jog mode request is initiated.

Note that if this register has been written by software, but deep sleep has not occurred , then the

value in this register may not necessarily reflect the current core clock speed. However, this value

must be consistent at all times with the value programmed in PMJCR[e500_Ratio].

Table 23-14. PMJCR Field Descriptions

Freescale Semiconductor