MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 1697

• Manufacturer Part Number: MPC8536-RDK
• Description: BOARD REF COMEXPRESS MPC8536
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536-RDK

• Contents: CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Index
PCI Express controller
Freescale Semiconductor
accessing configuration space
address translation and mapping unit (ATMU)
block diagram, 17-2
clocks
commands
configuration space accesses, 17-43
error handling registers, 17-30–17-43
features, 17-3
latency timer, 17-50
modes of operation, 17-4
overview, 17-1
POR configuration, 17-4
power management, 17-13–17-18, 17-69–17-70
register descriptions
endpoint (EP) mode, 17-44
root complex (RC) mode, 17-43
inbound windows, 17-25
outbound windows, 17-20
minimum CCB frequency equation, 4-26
operation, 4-25
command register, 17-46
link width, 17-4
root complex or endpoint mode, 17-4
configuration header registers, 17-45–17-67
endpoint (EP) mode, 17-25
root complex (RC) mode, 17-25
32-bit memory base address register, 17-52
64-bit high memory base address register, 17-53
64-bit low memory base address register, 17-53
base address registers, 17-51–17-53, 17-58
bridge control register, 17-67
bus status register, 17-47
cache line size register, 17-49
capabilities pointer register, 17-55, 17-65
command register, 17-46
configuration and status register base address
device ID register, 17-45, 17-54
I/O base register, 17-60
I/O base upper 16 bits register, 17-64
I/O limit register, 17-60
I/O limit upper 16 bits register, 17-65
interrupt line register, 17-55, 17-66
interrupt pin register, 17-56, 17-66
latency timer register, 17-50, 17-60
maximum latency (EP-mode) register, 17-57
memory base register, 17-62
memory limit register, 17-62
minimum grant (EP-mode) register, 17-56
prefetchable base upper 32 bits register, 17-64
prefetchable limit upper 32 bits register, 17-64
(PCSRBAR), 17-51, 17-58
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
device-specific configuration space registers,
extended configuration space registers, 17-82–17-90
memory-mapped registers, 17-6
prefetchable memory base register, 17-63
prefetchable memory limit register, 17-63
primary bus number register, 17-58
revision ID register, 17-48
secondary bus number register, 17-59
secondary status register, 17-61
subordinate bus number register, 17-59
subsystem vendor ID register, 17-54
vendor ID register, 17-45
capabilities register, 17-71
capability ID register, 17-71
data capabilities register, 17-72
device control register, 17-72
device status register, 17-73
link capabilities register, 17-74
link control register, 17-74
link status register, 17-75
MSI message address register, 17-80
MSI message capability ID register, 17-79
MSI message control register, 17-80
MSI message data register, 17-81
MSI message upper address register, 17-81
power management capabilities register, 17-69
power management capability ID register, 17-69
power management data register, 17-70
power management status and control register, 17-70
root control register, 17-78
root status register, 17-78
slot capabilities register, 17-76
slot control register, 17-77
slot status register, 17-77
advanced error capabilities and control register, 17-87
advanced error reporting capability ID register, 17-83
correctable error mask register, 17-86
correctable error source ID register, 17-90
correctable error status register, 17-86
error source ID register, 17-90
header log register, 17-88
root error command register, 17-89
root error status register, 17-89
uncorrectable error mask register, 17-84
uncorrectable error severity register, 17-85
uncorrectable error status register, 17-83
ATMU registers, 17-20–17-30
by acronym, see Register Index
configuration access registers, 17-10–17-13,
error management registers, 17-30–17-43
17-68–17-81
17-43–17-45
Index-11
P–P