MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 1286

Manufacturer Part Number

BOARD REF COMEXPRESS MPC8536

Manufacturer

Freescale Semiconductor

PowerQUICC ™r

CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Enhanced Secure Digital Host Controller

Since the eSDHC may have a multiple block data transfer executing concurrently with a CMD_wo_DAT

command, the eSDHC stores the Auto CMD12 response in the CMDRSP3 register and the

CMD_wo_DAT response is stored in CMDRSP0. This allows the eSDHC to avoid overwriting the Auto

CMD12 response with the CMD_wo_DAT and vice versa. When the eSDHC modifies part of the

command response registers it preserves the unmodified bits.

The buffer data port register is a 32-bit data port register used to access the internal buffer.

Offset: 0x020 (DATPORT)

Buffer Data Port Register (DATPORT)

Data content. The buffer data port register is for 32-bit data access by the CPU or an external DMA. When the

internal DMA is enabled, any write to this register is ignored, and a read from this register always yields 0.

When the internal DMA is not enabled and a write transaction is in

operation, DATPORT must not be read. DATPORT also must not be used to

read (or write) data by the CPU or external DMA if the data will be written

(or read) by the eSDHC internal DMA.

MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1

Figure 20-8. Buffer Data Port Register (DATPORT)

Table 20-10. DATPORT Field Descriptions

Freescale Semiconductor

Access: Read/Write