DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 23

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

Chapter 2: Board Components
Configuration, Status, and Setup Elements
Figure 2–5. PFL Configuration
February 2011 Altera Corporation
2.5 V
2.5 V
CLK_EN
DIP0
DIP1
DIP1
FACTORY/USER LOAD
LCD_PWRMON
USB_DISABLEn
CLK_SEL
MAX_RESETn
IMAGE_SEL
(FACTORY)
LOAD_IMAGE
(RESET_CONF
IGN)
CONFIG_LED0
CONFIG_LED1
CONFIG_LED2
Figure 2–5
Table 2–9
Table 2–9. Flash Memory Map (Part 1 of 2)
ERROR
LOAD
MAX_LED
Unused
EPM2210 System Controller
MAX II CPLD
FPGA_CONF_DONE
Flash
CFI
FLASH_RYBSYn
FPGA_DATA [7:0]
FPGA_nSTATUS
FPGA_nCONFIG
FLASH_D [15:0]
FLASH_A [25:1]
FLASH_D [15:0]
FLASH_A [25:1]
shows the flash memory map storage.
FLASH_ADVn
FLASH_RSTn
FLASH_RSTn
FLASH_RSTn
FLASH_ADVn
FLASH_WEn
FLASH_CEn
FLASH_OEn
FLASH_CLK
FLASH_WEn
shows the PFL configuration.
FPGA_DCLK
FLASH_OEn
FLASH_CLK
FLASH_CEn
MSEL [3:0]
Name
100 MHz
2.5 V
100 Ω
CONF_DONE_LED
2.5 V
Size (KB)
2.5 V
10 kΩ
Arria II GX FPGA Development Board Reference Manual
32
32
32
32
10 kΩ
INIT_DONE
nSTATUS
nCONFIG
CONF_DONE
DATA [7:0]
DCLK
FPP Port
nCE
Flash Interface
0x03FF-8000
0x03FF-0000
0x03FE-8000
0x03FE-0000
0x03FE-7FFF
0x03FF-FFFF
0x03FF-7FFF
0x03FE-FFFF
Address
MSEL3
MSEL2
MSEL1
MSEL0
10 kΩ
2–15