DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 17

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

Chapter 2: Board Components
MAX II CPLD EPM2210 System Controller
Table 2–7. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 3 of 5)
February 2011 Altera Corporation
flash_wen
fpga_conf_done
fpga_config_d[0]
fpga_config_d[1]
fpga_config_d[2]
fpga_config_d[3]
fpga_config_d[4]
fpga_config_d[5]
fpga_config_d[6]
fpga_config_d[7]
fpga_dclk
fpga_nconfig
fpga_nstatus
fsm_a[0]
fsm_a[1]
fsm_a[10]
fsm_a[11]
fsm_a[12]
fsm_a[13]
fsm_a[14]
fsm_a[15]
fsm_a[16]
fsm_a[17]
fsm_a[18]
fsm_a[19]
fsm_a[2]
fsm_a[20]
fsm_a[21]
fsm_a[22]
fsm_a[23]
fsm_a[24]
fsm_a[25]
fsm_a[3]
fsm_a[4]
fsm_a[5]
fsm_a[6]
fsm_a[7]
fsm_a[8]
fsm_a[9]
Schematic Signal Name
I/O Standard
2.5-V
Pin Number
EPM2210
D16
D10
D11
G15
B16
C15
A15
C11
A12
B12
C12
B13
E10
A13
B14
C13
E14
E15
E16
F16
D7
H4
H3
D9
D6
J1
B1
A4
A7
B4
B5
A6
A5
B6
J2
A2
E9
E4
E5
EP2AGX125
Pin Number
AD28
AE25
AC26
M13
M21
N26
C24
H19
K21
G23
D29
H21
D20
A23
B24
L25
E25
F21
J19
L21
F25
F26
F10
J21
L13
M4
C7
N6
G2
P6
K3
K2
P7
R4
K4
C8
N9
L4
J3
FSM bus flash memory write enable
FPGA configuration done
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration data
FPGA configuration clock
FPGA configuration active
FPGA configuration ready
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
FSM bus address
Arria II GX FPGA Development Board Reference Manual
Description
2–9