EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 93

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EP1C3

Manufacturer Part Number
EP1C3
Description
Cyclone FPGA Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet

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Preliminary Information
Altera Corporation
Software
Device Pin-
Outs
Ordering
Information
Note to
(1)
Cyclone devices are supported by the Altera Quartus II design software,
which provides a comprehensive environment for system-on-a-
programmable-chip (SOPC) design. The Quartus II software includes
HDL and schematic design entry, compilation and logic synthesis, full
simulation and advanced timing analysis, SignalTap II logic analysis, and
device configuration. See the Design Software Selector Guide for more
details on the Quartus II software features.
The Quartus II software supports the Windows 2000/NT/98, Sun Solaris,
Linux Red Hat v7.1 and HP-UX operating systems. It also supports
seamless integration with industry-leading EDA tools through the
NativeLink
Device pin-outs for Cyclone devices are available on the Altera web site
(http://www.altera.com).
Figure 39
information on a specific package, refer to the
Information Data
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
3.3-V PCI
LVDS
Table 70. Cyclone Maximum Output Clock Rate for Row Pins
EP1C3 devices do not support the PCI I/O standard. These parameters are only
available on row I/O pins.
I/O Standard
Tables 69
describes the ordering codes for Cyclone devices. For more
(1)
®
interface.
Sheet.
70:
-6 Speed
Grade
304
220
213
166
304
100
100
134
134
231
66
-7 Speed
Cyclone FPGA Family Data Sheet
Grade
304
220
213
166
304
100
100
134
134
231
66
Altera Device Package
-8 Speed
Grade
304
220
213
166
304
100
100
134
134
231
66
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
93

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