EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 37

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EP1C3

Manufacturer Part Number
EP1C3
Description
Cyclone FPGA Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet

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Preliminary Information
Altera Corporation
Figure 24. I/O Clock Regions
6
6
6
Cyclone Logic Array
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
6
6
PLLs
Cyclone PLLs provide general-purpose clocking with clock multiplication
and phase shifting as well as outputs for differential I/O support. Cyclone
devices contain two PLLs, except for the EP1C3 device, which contains
one PLL.
Column I/O Clock Region
Column I/O Clock Region
IO_CLK[5..0]
IO_CLK[5..0]
8
Global Clock
Network
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
Cyclone FPGA Family Data Sheet
6
6
6
I/O Clock Regions
I/O Clock Regions
Row
I/O Regions
37

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