EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 26

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Cyclone FPGA Family Data Sheet
Figure 14. Shift Register Memory Configuration
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m
Data is written into each address location at the falling edge of the clock
and read from the address at the rising edge of the clock. The shift register
mode logic automatically controls the positive and negative edge clocking
to shift the data in one clock cycle.
block in the shift register mode.
m -Bit Shift Register
m -Bit Shift Register
m -Bit Shift Register
m -Bit Shift Register
n Shift Register
Figure 14
shows the M4K memory
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Preliminary Information
Altera Corporation
n Number
of Taps