EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 33

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Preliminary Information
Altera Corporation
Figure 20. Read/Write Clock Mode in Simple Dual-Port Mode
Note to
(1)
wraddress[ ]
address[ ]
byteena[ ]
wrclken
wrclock
rdclken
All registers shown except the rden register have asynchronous clear ports.
rdclock
data[ ]
wren
rden
Figure
6 LAB Row
Clocks
20:
6
Single-Port Mode
The M4K memory blocks also support single-port mode, used when
simultaneous reads and writes are not required. See
M4K memory block can support up to two single-port mode RAM blocks
if each RAM block is less than or equal to 2K bits in size.
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
Q
Q
Q
Q
Q
Q
Generator
Pulse
Write
Data In
Read Address
Write Address
Byte Enable
Read Enable
Write Enable
Note (1)
Memory Block
1,024
2,048
4,096
Data Out
256
512
Cyclone FPGA Family Data Sheet
16
8
4
2
1
D
ENA
Figure
Q
21. A single
To MultiTrack
Interconnect
33