EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 86

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Cyclone FPGA Family Data Sheet
86
LVCMOS
3.3-V LVTTL
2.5-V LVTTL
1.8-V LVTTL
1.5-V LVTTL
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
LVCMOS
3.3-V LVTTL
2.5-V LVTTL
1.8-V LVTTL
1.5-V LVTTL
3.3-V PCI
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
Table 59. Cyclone I/O Standard Column Pin Input Delay Adders
Table 60. Cyclone I/O Standard Row Pin Input Delay Adders
I/O Standard
I/O Standard
(1)
Tables 59
row I/O pins for all packages. If an I/O standard is selected other than
LVTTL 24 mA with a fast slew rate, add the selected delay to the external
t
CO
Min
Min
-6 Speed Grade
-6 Speed Grade
and t
SU
through
I/O parameters shown in
Max
Max
214
326
214
326
28
221
221
264
264
197
28
221
221
264
264
197
0
0
0
0
0
64
show the adder delays associated with column and
-7 Speed Grade
Min
-7 Speed Grade
Min
Max
Max
235
358
235
358
30
244
244
291
291
217
30
244
244
291
291
217
0
0
0
0
0
Tables 44
-8 Speed Grade
Min
-8 Speed Grade
Min
through 47.
Preliminary Information
Altera Corporation
Max
Max
256
391
256
391
33
266
266
317
317
237
33
266
266
317
317
237
0
0
0
0
0
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps