EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 76

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Cyclone FPGA Family Data Sheet
Figure 37. Dual-Port RAM Timing Microparameter Waveform
76
unreg_data-out
reg_data-out
wraddress
rdaddress
rdclock
data-in
wrclock
wren
rden
doutn-2
an-1
din-1
t
t
DATASU
WERESU
doutn-1
bn
t
DATAH
an
din
Figure 37
shown in
t
t
t
R4
C4
LOCAL
Table 43. Routing Delay Internal Timing Microparameter Descriptions
t
doutn-1
WEREH
Symbol
doutn
a0
b0
Table
shows the memory waveforms for the M4K timing parameters
t
t
DATACO1
WEREH
42.
t
Delay for an R4 line with average loading; covers a distance
of four LAB columns
Delay for an C4 line with average loading; covers a distance
of four LAB rows
Local interconnect delay
DATACO2
a1
t
RC
doutn
dout0
a2
b1
t
t
WADDRSU
a3
WERESU
Parameter
dout0
din4
a4
b2
Preliminary Information
Altera Corporation
t
WADDRH
din5
a5
b3
din6
a6