EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 64

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EP1C3

Manufacturer Part Number
EP1C3
Description
Cyclone FPGA Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet

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Cyclone FPGA Family Data Sheet
64
Figure 36
Figure 36. Cyclone JTAG Waveforms
Table 21
devices.
t
t
t
t
t
t
t
t
t
t
t
t
t
Captured
Symbol
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 21. Cyclone JTAG Timing Parameters & Values
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
shows the JTAG timing parameters and values for Cyclone
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
shows the timing requirements for the JTAG signals.
t
JCH
t
t
JPZX
JSZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
Preliminary Information
t
JSXZ
JPH
100
Altera Corporation
Min
50
50
20
45
20
45
t
JPXZ
Max
25
25
25
35
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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