EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 58

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Cyclone FPGA Family Data Sheet
Figure 35. Cyclone I/O Banks
Notes to
(1)
(2)
58
Also Supports
Figure 35
Figure 35
the 3.3-V PCI
I/O Standard
I/O Bank 1
Figure
I/O Bank 1
is a top view of the silicon die.
is a graphic representation only. Refer to the pin list and the Quartus II software for exact pin locations.
35:
Each I/O bank has its own VCCIO pins. A single device can support 1.5-V,
1.8-V, 2.5-V, and 3.3-V interfaces; each individual bank can support a
different standard with different I/O voltages. Each bank also has dual-
purpose VREF pins to support any one of the voltage-referenced
standards (e.g., SSTL-3) independently. If an I/O bank does not use
voltage-referenced standards, the V
Each I/O bank can support multiple standards with the same V
input and output pins. For example, when V
support LVTTL, LVCMOS, 3.3-V PCI, and SSTL-3 for inputs and outputs.
Notes
(1),
(2)
All I/O Banks Support
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
LVDS
SSTL-2 Class I and II
SSTL-3 Class I and II
I/O Bank 2
I/O Bank 4
Power Bus
Individual
REF
pins are available as user I/O pins.
CCIO
is 3.3 V, a bank can
Preliminary Information
Altera Corporation
I/O Bank 3
I/O Bank 3
Also Supports
the 3.3-V PCI
I/O Standard
CCIO
for