EP1C3 ALTERA [Altera Corporation], EP1C3 Datasheet - Page 65

• Manufacturer Part Number: EP1C3
• Description: Cyclone FPGA Family
• Manufacturer: ALTERA [Altera Corporation]

Preliminary Information
Altera Corporation
SignalTap II
Embedded
Logic Analyzer
Configuration
f
For more information on JTAG, see the following documents:
Cyclone devices feature the SignalTap II embedded logic analyzer, which
monitors design operation over a period of time through the IEEE
Std. 1149.1 (JTAG) circuitry. A designer can analyze internal logic at speed
without bringing internal signals to the I/O pins. This feature is
particularly important for advanced packages, such as FineLine BGA
packages, because it can be difficult to add a connection to a pin during
the debugging process after a board is designed and manufactured.
The logic, circuitry, and interconnects in the Cyclone architecture are
configured with CMOS SRAM elements. Cyclone devices are
reconfigurable and are 100% tested prior to shipment. As a result, the
designer does not have to generate test vectors for fault coverage
purposes, and can instead focus on simulation and design verification. In
addition, the designer does not need to manage inventories of different
ASIC designs. Cyclone devices can be configured on the board for the
specific functionality required.
Cyclone devices are configured at system power-up with data stored in an
Altera configuration device or provided by a system controller. The
Cyclone device’s optimized interface allows the device to act as controller
in an active serial configuration scheme with the new low-cost serial
configuration device. Cyclone devices can be configured in under 120 ms
using serial data at 20 MHz. The serial configuration device can be
programmed via the ByteBlaster II download cable, the Altera
Programming Unit (APU), or third-party programmers.
In addition to the new low-cost serial configuration device, Altera offers
in-system programmability (ISP)-capable configuration devices that can
configure Cyclone devices via a serial data stream. The interface also
enables microprocessors to treat Cyclone devices as memory and
configure them by writing to a virtual memory location, making
reconfiguration easy. After a Cyclone device has been configured, it can
be reconfigured in-circuit by resetting the device and loading new data.
Real-time changes can be made during system operation, enabling
innovative reconfigurable computing applications.
Application Note 39 (IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in
Altera Devices)
Jam Programming & Test Language Specification
Cyclone FPGA Family Data Sheet
65