h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 706

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 Multimedia Card Interface (MCIF)
19.3.16 Transfer Clock Control Register (CLKON)
CLKON controls the transfer clock frequency and clock ON/OFF.
A 20-MHz system clock is needed, and bits CSEL2 to CSEL0 should be set to B'100 for a 20-
Mbps transfer clock according to the limitation of the maximum operating frequency of this LSI.
At this time, bits CSEL2 to CSEL0 should be cleared to B'000 for a 200-kbps transfer clock in the
open drain format output status in MMC mode.
Rev. 3.00 Jan 25, 2006 page 654 of 872
REJ09B0286-0300
Bit
0
Bit
7
6
to
3
2
1
0
Bit Name
MMCPE
Bit Name
CLKON
—
CSEL2
CSEL1
CSEL0
Initial Value
0
Initial Value
0
All 0
0
0
0
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
MCIF Pin Function Enable
Enables/disables input/output of all MCIF
input/output pins.
0: Disables all inputs/outputs.
1: Enables MCCLK, MCCMD/MCTxD,
Outputs of the MCCSB and MCDATDIR and
MCCMDDIR pins are also disabled via the
SPCNUM bit and DIRME bit, respectively.
Description
Clock On
0: Fixes the transfer clock output from the
1: Outputs the transfer clock from the MCCLK
Reserved
These bits are always read as 0 and cannot be
modified.
Transfer Clock Frequency Select
000: Uses /100 as a transfer clock.
001: Uses /8 as a transfer clock.
010: Uses /4 as a transfer clock.
011: Uses /2 as a transfer clock.
100: Uses
101 to 111: Setting prohibited
MCDAT/MCRxD, MCCSA/MCDATDIR, and
MCCSB/MCCMDDIR pin inputs/outputs.
MCCLK pin to low.
pin.
as a transfer clock.