h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 479

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h8s-2158

Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.4.7
Figure 16.11 shows an example of the operation for reception in asynchronous mode. In serial
reception, the SCI operates as described below.
1. The SCI monitors the communication line, and if a start bit is detected, performs internal
2. If an overrun error (when reception of the next data is completed while the RDRF flag in SSR
3. If a parity error is detected, the PER bit in SSR is set to 1 and receive data is transferred to
4. If a framing error (when the stop bit is 0) is detected, the FER bit in SSR is set to 1 and receive
5. If reception finishes successfully, the RDRF bit in SSR is set to 1, and receive data is
Figure 16.11 Example of SCI Operation in Reception (Example with 8-Bit Data, Parity,
synchronization, receives receive data in RSR, and checks the parity bit and stop bit.
is still set to 1) occurs, the ORER bit in SSR is set to 1. If the RIE bit in SCR is set to 1 at this
time, an ERI interrupt request is generated. Receive data is not transferred to RDR. The RDRF
flag remains to be set to 1.
RDR. If the RIE bit in SCR is set to 1 at this time, an ERI interrupt request is generated.
data is transferred to RDR. If the RIE bit in SCR is set to 1 at this time, an ERI interrupt
request is generated.
transferred to RDR. If the RIE bit in SCR is set to 1 at this time, an RXI interrupt request is
generated. Because the RXI interrupt routine reads the receive data transferred to RDR before
reception of the next receive data has finished, continuous reception can be enabled.
RDRF
FER
Serial Data Reception (Asynchronous Mode)
1
Start
bit
0
D0
D1
1 frame
Data
Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
D7
RXI interrupt
request
generated
Parity
bit
0/1
One Stop Bit)
Stop
bit
1
Start
bit
0
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt service routine
D0
Rev. 3.00 Jan 25, 2006 page 427 of 872
D1
Data
D7
Parity
bit
0/1
ERI interrupt request
generated by framing
error
Stop
bit
REJ09B0286-0300
0
Idle state
(mark state)
1

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