h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 227

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

8.2.11
DTCRB is a register provided in each pointer set that controls the operation of the interrupt flag in
each pointer set and the data transfer between pointers.
Bit
7
6
5
4
Bit Name
BOVF_RE
BOVF_WE
FULLE
EMPTYE
Data Transfer Control Register B (DTCRB)
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Boundary Overflow Enable (at reading)
Selects whether to reflect RAR boundary
overflow to the BOVF_R flag in DTSTRC.
0: Boundary overflow (at reading) is not
1: Boundary overflow (at reading) is reflected to
Boundary Overflow Enable (at writing)
Selects whether to reflect WAR boundary
overflow to the BOVF_W flag in DTSTRC.
0: Boundary overflow (at writing) is not reflected
1: Boundary overflow (at writing) is reflected to
FIFO Full Enable
Selects whether to reflect detection of FIFO full
(generation of WAR = RAR or TMP = WAR
(when the read temporary pointer is selected)
according to the write bus cycle) to the FULL
flag in DTSTRC.
0: FIFO full detection is not reflected to the
1: FIFO full detection is reflected to the FULL
FIFO Empty Enable
Selects whether to reflect detection of FIFO
empty (generation of RAR = WAR or TMP =
RAR (when the write temporary pointer is
selected) according to the read bus cycle) to
the EMPTY flag in DTSTRC.
0: FIFO empty detection is not reflected to the
1: FIFO empty detection is reflected to the
EMPTY flag
EMPTY flag
to the BOVF_W flag
the BOVF_W flag
FULL flag
flag
reflected to the BOVF_R flag
the BOVF_R flag
Rev. 3.00 Jan 25, 2006 page 175 of 872
Section 8 RAM-FIFO Unit (RFU)
REJ09B0286-0300