h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 424

no-image

h8s-2158

Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 14 Timer Connection
14.4.9
Using the signals generated/selected with timer connection, it is possible to generate a waveform
based on the composite synchronization signal (blanking waveform).
One kind of blanking waveform is generated by combining HFBACKI and VFBACKI inputs,
with the phase polarity made positive by means of bits HFINV and VFINV in TCONRI, with the
IVO signal.
The logic of CBLANK output waveform generation is shown in figure 14.9.
Rev. 3.00 Jan 25, 2006 page 372 of 872
REJ09B0286-0300
Mode
Separate
mode
HFBACKI input (positive)
VFBACKI input (positive)
IVO signal (positive)
CBLANK Output
IVI Signal
VSYNCI
input
Figure 14.9 CBLANK Output Waveform Generation
IVO Signal
IVI signal (without fall
modification or IHI
synchronization)
IVI signal (without fall
modification, with IHI
synchronization)
IVI signal (with fall
modification, without IHI
synchronization)
IVI signal (with fall
modification and IHI
synchronization)
IVG signal
Falling edge sensing
Rising edge sensing
Meaning of IVO Signal
VSYNCI input (vertical synchronization signal)
is output directly
Meaningless unless VSYNCI input (vertical
synchronization signal) is synchronized with
HSYNCI input (horizontal synchronization
signal)
VSYNCI input (vertical synchronization signal)
fall is modified before output
VSYNCI input (vertical synchronization signal)
fall is modified and signal is synchronized with
HSYNCI input (horizontal synchronization
signal) before output
Internal synchronization signal is output
Reset
Set
Q
CBLANK signal
(positive)

Related parts for h8s-2158