h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 667
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h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
(927 pages)
- Current page: 667 of 927
- Download datasheet (7Mb)
Notes: 1. When an EP2TF interrupt is specified as a USBIB or USBIC interrupt according to the INTSELR0 setting, the corresponding interrupt occurs.
Send an IN token packet
Send an IN token packet
Figure 18.11 Operation on Receiving an IN Token (EP2-IN: Initial FIFO Is Empty)
Receive an IN data
handshake packet
handshake packet
Receive an ACK
2. When an EP2TS interrupt is specified as a USBIB or USBIC interrupt according to the INTSELR0 setting, the corresponding interrupt occurs.
packet (8 bytes)
Receive a NAK
Re-transmission
In this case, if a USBIB or USBIC interrupt occurs, interrupt source determination process is not required. (Note that TFFR0 must be
accessed to clear the flags.)
In this case, if a USBIB or USBIC interrupt occurs, interrupt source determination process is not required. (Note that TSFR0 must be
accessed to clear the flags.)
USB Host
Send NAK to the slave CPU
Send ACK to the slave CPU
Receive an IN token packet
Receive an IN token packet
USB Function Core
Send NAK to the host CPU
Receive an IN data
packet (8 bytes)
Receive ACK
Section 18 Universal Serial Bus Interface (USB)
Modify FVSR2 and enable
because the EP2 FIFO is
Write data to the EP2 FIFO
Read data from the EP2
Request an USBID
interrupt (EP2TF) *
Disable data read
Request an USBID
interrupt (EP2TS) *
data transmission
Core Interface
Rev. 3.00 Jan 25, 2006 page 615 of 872
Modify FVSR2
FIFO
empty
1
2
Read FVSR2 and write data
if an EP2TF interrupt occurs
The following procedure is
Initiate the USBID interrupt
Read USBIFR0 and check
to EPDR2 for the number
Read TFFR0 and check
written to the EP2 FIFO
Clear the EP2TF bit of
Complete the USBID
the same as that when
if a TF interrupt occurs
REJ09B0286-0300
of bytes which can be
interrupt processing
the initial FIFO is full.
Set the EP2TE bit of
interrupt processing
Initiate the USBID
Slave CPU
PTTER0 to 1
TFFR0 to 0
processing
or not
or not
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