h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 47
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h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
(927 pages)
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Table 5.7
Table 5.8
Table 5.9
Section 6 Bus Controller
Table 6.1
Table 6.2
Table 6.3
Table 6.4
Table 6.5
Table 6.6
Table 6.7
Table 6.8
Table 6.9
Table 6.10
Table 6.11
Section 7 Data Transfer Controller (DTC)
Table 7.1
Table 7.2
Table 7.3
Table 7.4
Table 7.5
Table 7.6
Table 7.7
Section 8 RAM-FIFO Unit (RFU)
Table 8.1
Table 8.2
Table 8.3
Table 8.4
Table 8.5
Table 8.6
Table 8.7
Section 9 I/O Ports
Table 9.1
Table 9.2
Table 9.3
Interrupt Response Times....................................................................................... 98
Number of States in Interrupt Handling Routine Execution Status........................ 98
Interrupt Source Selection and Clearing Control.................................................... 100
Pin Configuration ................................................................................................... 105
Address Ranges and External Address Spaces....................................................... 115
Bit Settings and Bus Specifications of Basic Bus Interface ................................... 117
Bus Specifications for Basic Expansion Area/Basic Bus Interface ........................ 118
Bus Specifications for 256-kbyte Expansion Area/Basic Bus Interface................. 119
Bus Specifications for CP Expansion Area (Basic Mode)/Basic Bus Interface ..... 120
Bus Specifications for CF Expansion Area (Memory Card Mode)/
Basic Bus Interface................................................................................................. 121
Address Range for IOS Signal Output ................................................................... 122
Data Buses Used and Valid Strobes ....................................................................... 124
Data Buses Used and Valid Strobes ....................................................................... 138
Pin States in Idle Cycle .......................................................................................... 142
Correspondence between Interrupt Sources and DTCER....................................... 150
Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs ................ 154
Register Functions in Normal Mode ...................................................................... 157
Register Functions in Repeat Mode ....................................................................... 158
Register Functions in Block Transfer Mode........................................................... 159
DTC Execution Status ............................................................................................ 163
Number of States Required for Each Execution Status .......................................... 163
Valid Bits in BAR, RAR, WAR, and TMP ............................................................ 174
Correspondence between Activation Sources and ID Numbers ............................. 183
RFU Bus Cycle Types............................................................................................ 185
Requests from Peripheral Modules and RFU Bus Cycle........................................ 186
Bus Cycle Insertion ................................................................................................ 189
Settings when Using Boundary Overflow
(Transmission/Reception of Single Data Block) .................................................... 192
DATAN/FREEN Read Value................................................................................. 204
Port Functions ........................................................................................................ 205
Port 1 Input Pull-Up MOS States ........................................................................... 211
Port 2 Input Pull-Up MOS States ........................................................................... 215
Rev. 3.00 Jan 25, 2006 page xlvii of lii
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